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先發(fā) FX1S數(shù)據讀報文，PLC接受到信號準備數(shù)據放到緩沖區(qū)。然后在用ReadFile從緩沖區(qū)接受一次報文。。。 30 MS左右
這時間正常嗎？還是說我設置有問題？總感覺這樣時間有點長啊。【工控菜鳥一個，放下代碼求老鳥指點一二，有無能提升效率的地方。 ^_^】

復制代碼 #include <Windows.h> #include "codecb.h" #include "invariant.h" #include <assert.h> #include <tchar.h> #include "timing.h" extern HANDLE commport; _CRT_ALIGN (32) char ASCII_tonums_RVlut[0xFFFF+1]; void build_ASC_RVlut (void) {   uint32_t ii;   static BOOL __init = FALSE;   if ( __init == TRUE) return;        __init  = TRUE;   ZeroMemory (ASCII_tonums_RVlut, sizeof (ASCII_tonums_RVlut));   for (ii = 0; ii != 0x10000; ii++) {    uint16_t lo = ii & 0x00FF;    uint16_t hi = ii >> 8;    if ( (( lo >= '0' && lo <= '9') || ( lo >= 'A' && lo <= 'F'))     && (( hi >= '0' && hi <= '9') || ( hi >= 'A' && hi <= 'F')))    {     if ( ( hi >= '0' && hi <= '9'))       ASCII_tonums_RVlut[ii] = hi - '0';     else if ( ( hi >= 'A' && hi <= 'F'))       ASCII_tonums_RVlut[ii] = hi - 'A' + 10;     if ( ( lo >= '0' && lo <= '9'))       ASCII_tonums_RVlut[ii] |= ( ( (unsigned) (lo - '0')) << 4);     else if ( ( lo >= 'A' && lo <= 'F'))       ASCII_tonums_RVlut[ii] |= ( ( (unsigned) (lo - 'A' + 10)) << 4);    }   } } BOOL comm_init (int comm_index) {   DCB dcbs;   COMMTIMEOUTS ct;     BOOL success_io_;   TCHAR comm_buf0[256];   _stprintf (& comm_buf0[0], _T ("//./COM%i"), comm_index);   comm_close ();   commport = CreateFile ( & comm_buf0[0], GENERIC_READ | GENERIC_WRITE, 0,               NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL );   success_io_ = GetCommState (commport, & dcbs);   assert (success_io_ != FALSE);   dcbs.BaudRate = CBR_9600;   dcbs.fParity  = TRUE;   dcbs.Parity   = EVENPARITY;   dcbs.StopBits = ONESTOPBIT;   dcbs.ByteSize = 7;   dcbs.fDtrControl = DTR_CONTROL_DISABLE;   dcbs.fRtsControl = RTS_CONTROL_DISABLE;        success_io_ = SetupComm (commport, 2048, 2048);   assert (success_io_ != FALSE);   success_io_ = SetCommState (commport, & dcbs);   assert (success_io_ != FALSE);   // SetTimeOut.   ct.ReadIntervalTimeout = 0x0000FFFF;   ct.ReadTotalTimeoutMultiplier = 0x0000FFFF;   ct.ReadTotalTimeoutConstant = 0xFFFFFFFE;   ct.WriteTotalTimeoutMultiplier = 0x0000FFFF;   ct.WriteTotalTimeoutConstant =   0xFFFFFFFE;        success_io_ = SetCommTimeouts (commport, &ct);     assert (success_io_ != FALSE);   success_io_ = SetupComm (commport, 2400, 2400);     assert (success_io_ != FALSE);   success_io_ = PurgeComm (commport, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_RXCLEAR | PURGE_TXABORT);   assert (success_io_ != FALSE);   build_ASC_RVlut ();      timing_init48 ();   INIT_WSCCRSEC__; } void comm_close (void) {   if (commport != INVALID_HANDLE_VALUE)   {     PurgeComm (commport, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_RXCLEAR | PURGE_TXABORT);     CloseHandle (commport);   }   commport = INVALID_HANDLE_VALUE; } int8_t readOYB (int16_t e_addr) {   struct read_section2 rdsec;   char varsbuf[128];   int isr = 0;   int tm_numbs = 0;   uint16_t rv_numbs = 0;   BOOL io_success_;   DWORD rv_numbs2 = 0;   /* prepare Output-register read_section. */   isr = fx1s_makersecb ( & rdsec, FX1S_REGISTER_FIELD_Y_OUT,         & rv_numbs, FX1S_VERSION_30MR, e_addr);   assert (isr == FX1S_OK);   /* write Output-register read-code. */   io_success_ = WriteFile (commport, & rdsec,      sizeof(struct read_section), & tm_numbs, NULL);   assert (io_success_ != FALSE);   assert (tm_numbs == sizeof(struct read_section));   io_success_ = ReadFile  (commport, & varsbuf[0], rv_numbs, & rv_numbs2, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs2 == rv_numbs);   assert (varsbuf[0] == SECTION_LINK_STX);   return ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[1]]; } void setOYB (int16_t e_addr, int8_t val) {   char varsbuf[128];   int isr = 0;   int tm_numbs = 0;   uint16_t rv_numbs = 0;   BOOL io_success_;   DWORD rv_numbs2 = 0;   /* prepare Output-register write_section. */   isr = fx1s_makewsecb (& varsbuf[0], & val, FX1S_REGISTER_FIELD_Y_OUT,               & rv_numbs, FX1S_VERSION_30MR, e_addr);   assert (isr == FX1S_OK);   /* write Output-register write-code. */   io_success_ = WriteFile (commport, & varsbuf[0],      rv_numbs, & tm_numbs, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs == tm_numbs);   io_success_ = ReadFile  (commport, & varsbuf[0], 1, & rv_numbs2, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs2 == 1);   assert (varsbuf[0] == SECTION_LINK_ACK); } static __forceinline int8_t readRELAY_M (int16_t addr) {   struct read_section2 rdsec;   char varsbuf[128];   int isr = 0;   int tm_numbs = 0;   uint16_t rv_numbs = 0;   BOOL io_success_;   DWORD rv_numbs2;   isr = fx1s_makersecb ( & rdsec, FX1S_REGISTER_FIELD_M,         & rv_numbs, FX1S_VERSION_14MR, addr);   assert (isr == FX1S_OK);   io_success_ = WriteFile (commport, & rdsec,      sizeof(struct read_section), & tm_numbs, NULL);   assert (io_success_ != FALSE);   assert (tm_numbs == sizeof(struct read_section));   io_success_ = ReadFile  (commport, & varsbuf[0], rv_numbs, & rv_numbs2, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs2 == rv_numbs);   assert (varsbuf[0] == SECTION_LINK_STX);   return ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[1]]; } static  __forceinline void writeRELAY_M (uint16_t addr, int8_t val) {   char varsbuf[128];   int isr = 0;   int tm_numbs = 0;   uint16_t rv_numbs = 0;   BOOL io_success_;   DWORD rv_numbs2;   /* prepare Output-register write_section. */   isr = fx1s_makewsecb (& varsbuf[0], & val, FX1S_REGISTER_FIELD_M,               & rv_numbs, FX1S_VERSION_14MR, addr);   assert (isr == FX1S_OK);   /* write Output-register write-code. */   io_success_ = WriteFile (commport, & varsbuf[0],      rv_numbs, & tm_numbs, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs == tm_numbs);   io_success_ = ReadFile  (commport, & varsbuf[0], 1, & rv_numbs2, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs2 == 1);   assert (varsbuf[0] == SECTION_LINK_ACK); } void plc_force_close_ (void) {   BYTE obt;     /* force close PLC [by M8037]  **/     obt = readRELAY_M (8037);     writeRELAY_M (8037, obt | 0x20); } void plc_force_open_ (void) {   BYTE obt;   /* force open PLC [by M8035/M8036/M8037]  **/   obt = readRELAY_M (8037);   obt &= ~(1 << (8037 & 7));   writeRELAY_M (8037, obt);   obt = readRELAY_M (8035);   obt |= (11 << (8035 & 7));   writeRELAY_M (8035, obt); } void plc_set_pulse235_ (uint32_t val) {   int isr = 0;   char varsbuf[128];   uint16_t rv_numbs = 0;   DWORD rv_numbs2 = 0;   DWORD rv_numbs3 = 0;   BOOL io_success_;   isr = fx1s_makewsecb (& varsbuf[0], & val, FX1S_REGISTER_FIELD_C32,               & rv_numbs, FX1S_VERSION_14MR, PULSE_ENCODER_ADDR);   assert (isr == FX1S_OK);   rv_numbs2 = rv_numbs;   io_success_ = WriteFile (commport, & varsbuf[0], rv_numbs, & rv_numbs3, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs2 == rv_numbs3);   io_success_ = ReadFile  (commport, & varsbuf[0], 1, & rv_numbs2, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs2 == 1);   assert (varsbuf[0] == SECTION_LINK_ACK); } uint32_t plc_get_pulse235_ (void) {   union {     char bgroup[4];     int32_t inter;   } cc_timing;   BOOL io_success_;   DWORD rv_numbs = 0;   BYTE varsbuf[128];   io_success_ = WriteFile (commport, & g_crs2_pulse235.rsc, sizeof (struct read_section), & rv_numbs, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs == sizeof (struct read_section));   io_success_ = ReadFile  (commport, & varsbuf [0], g_crs2_pulse235.rsc_cnt, & rv_numbs, NULL);   assert (io_success_ != FALSE);   assert (rv_numbs == g_crs2_pulse235.rsc_cnt);   assert (varsbuf[0] == SECTION_LINK_STX);   assert (varsbuf[9] == SECTION_LINK_ETX);   cc_timing.bgroup[0] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[1]];   cc_timing.bgroup[1] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[3]];   cc_timing.bgroup[2] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[5]];   cc_timing.bgroup[3] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[7]];   return cc_timing.inter; }

FX1S 報文編解碼

復制代碼 /*- * Copyright (c) 2017 moecmks * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright *    notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright *    notice, this list of conditions and the following disclaimer in the *    documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRCMD, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ #if !defined (codec_included_MOECMKS) #define codec_included_MOECMKS /* * fx1s read/write codec. * simple, each read a current register size unit memory * more information, please refer to the PLC manual and Internet resources. */ #if defined (__cplusplus)  /** __cplusplus */ extern "C" { #endif  /** __cplusplus */ /* Portable fixed length ***/ #include "stdint.h" /* * errror code */ #define FX1S_RANGE 1 #define FX1S_FAIL 2 #define FX1S_KFAIL 3 #define FX1S_UNKN 4 #define FX1S_LIMIT 5 #define FX1S_NAK 6 #define FX1S_ACK 7 #define FX1S_PARA 8 #define FX1S_INCOP 9 #define FX1S_OK 0 /* * version control */ enum FX1S_VERSION {   FX1S_VERSION_10MR = 0,   FX1S_VERSION_14MR,   FX1S_VERSION_20MR,   FX1S_VERSION_30MR,   FX1S_VERSION_OVERFLAGS }; /* * register field. * Ignore T bit register and set register. * Ignore C bit register */ enum FX1S_REGISTER_FIELD {   FX1S_REGISTER_FIELD_S = 0,   FX1S_REGISTER_FIELD_X,   FX1S_REGISTER_FIELD_Y_OUT,   FX1S_REGISTER_FIELD_Y_PLS,   FX1S_REGISTER_FIELD_D,   FX1S_REGISTER_FIELD_T,   FX1S_REGISTER_FIELD_M,   FX1S_REGISTER_FIELD_C16,   FX1S_REGISTER_FIELD_C32,   FX1S_REGISTER_FIELD_CRESET }; /* * section .link code */ #define SECTION_LINK_STX 0x02 /* PLC info-section begin flags. */ #define SECTION_LINK_ETX 0x03 /* PLC info-section end flags .***/ #define SECTION_LINK_EOT 0x03 /* .***/ #define SECTION_LINK_ENQ 0x05 /* PLC only test enable */ #define SECTION_LINK_ACK 0x06 /* PLC reply "can do" */ #define SECTION_LINK_LF 0x0A /* .***/ #define SECTION_LINK_CL 0x0C /* .***/ #define SECTION_LINK_CR 0x0D /* .***/ #define SECTION_LINK_NAK 0x15 /* PLC reply "bad things" */ /* * section cmdion. */ #define SECTION_CMD_READ      '0' /* .***/ #define SECTION_CMD_WRITE     '1' /* .***/ #define SECTION_CMD_FORCE_ON  '7' /* .***/ #define SECTION_CMD_FORCE_OFF '8' /* .***/ /* * read section */ struct read_section {   uint8_t stx; /* read_section's stdhead. always SECTIOM_LINK_STX */   uint8_t cmd; /* read_section's cmd  always SECTIOM_CMD_READ  */   uint8_t unit_address[4];  /* read_section's address*/   uint8_t numb[2];          /* read's byte count. simple always one */   uint8_t etx;    /* read_section's stdend.   always SECTION_LINK_ETX  */   uint8_t crc[2]; /* correcting code*/ }; /* * read section2 */ struct read_section2 {   uint8_t stx; /* read_section's stdhead. always SECTIOM_LINK_STX */   uint8_t cmd; /* read_section's cmd  always SECTIOM_CMD_READ  */   uint8_t unit_address[4];  /* read_section's address*/   uint8_t numb[2];          /* read's byte count. simple always one */   uint8_t etx;    /* read_section's stdend.   always SECTION_LINK_ETX  */   uint8_t crc[2]; /* correcting code*/   uint8_t crce; /* easy to read..**/   uint16_t opbsize; /******/   uint8_t opboff; /* for bit register(X, Y, M.) **/   uint16_t opbaddr; /* easy to read. **/ }; /* * write section */ struct write_section {   uint8_t stx; /* write_section's stdhead.  always SECTIOM_LINK_STX */   uint8_t cmd; /* write_section's cmd  always SECTIOM_CMD_WRITE   */   uint8_t unit_address[4]; /* write_section's address*/   uint8_t numb[2]; /* write's byte count.. must <= 64  */   uint8_t etx; /* write_section's stdend. */   uint8_t crc[2]; /* correcting code*/   uint8_t crce; /* easy to read..**/   uint8_t obpoff; /* for bit register(X, Y, M.) **/   uint16_t opbaddr; /* easy to read. **/ }; /* * force section */ struct force_section {   uint8_t stx; /* force_section's stdhead.  always SECTIOM_LINK_STX */   uint8_t cmd; /* force_section's cmd  always SECTIOM_CMD_FORCE_OFF or SECTIOM_CMD_FORCE_ON   */   uint8_t unit_address[4]; /* force_section's address*/   uint8_t etx; /* force_section's stdend. */   uint8_t crc[2]; /* correcting code*/ }; /* * Accept the write section is very simple, * if successful send SECTION_LINK_ACK otherwise SECTION_LINK_NAK */ int fx1s_makersecb (struct read_section2 *rsec, /* write to the serial port, use the size of the read_section */                          enum FX1S_REGISTER_FIELD rf, uint16_t  *rvap_size,                          enum FX1S_VERSION ver, uint16_t address); int fx1s_makewsecb (void *wsec, /* Variable size structure, so use void *, please understand **/                    void *spval,                          enum FX1S_REGISTER_FIELD rf, uint16_t  *wsec_size,                          enum FX1S_VERSION ver, uint16_t address); int fx1s_makefsecb (struct force_section *fsec,                          enum FX1S_REGISTER_FIELD rf,                          enum FX1S_VERSION ver, uint16_t address);             #if defined (__cplusplus)  /** __cplusplus */ } #endif  /** __cplusplus */ #endif /* codec_included_MOECMKS */